Just a quick informative note with my Design Rules settings for the iTead Studio PCB service, with Altium.
Electrical Minimum Clearance: 0.2mm
Routing Width: 0.2mm
Routing Corners: 2,54, 45° (not really relevant)
Routing Vias: Minimum Diameter: 0.5mm; Minimum Via Hole Size: 0.3mm Preferred: 0.35mm
Solder Mask Expansion: 0.1mm
Power Plane Connect: Conductor Width: 0.3mm Air-Gap:0.3mm Expansion: 0.5mm
Power Plane Clearance: 0.5mm
Polygon Connect: Conductor Width: 0.3mm
Manufacturing Hole Size: Minimum: 0.3mm
Hole to Hole Clearance: 0.2mm
Minimum Solder Mask Sliver: 0.1mm
Silkscreen over Component Pads: 0.15mm (actually, should be rather 0, as the silkscreen isn’t (or shouldn’t be) printed on pads)
Silk To Silk Clearance: 0.1mm
Also, don’t forget the minimum Soldermask line width is 0.1mm (for text and drawings)
Sorry for the metrical system impaired people. As you can see, these settings are a little bit tighter than the ones specified by iTeadStudio, to go along with their “6mil (recommended >8mil)” funny sentence. Well, not really, as 0.2mm are equivalent to 7.87mils but it worked for me. Maybe the 0.35mm/0.5mm vias are borderline. If you want to be sure about the results (and not get the Fab people angry), you should make it more 0.35mm/0.6mm or 0.3mm/0.7mm, as there’s a 0.09mm tolerance in the hole registration and diameter.
For Gerber generation, I use the default settings, with the 2:3 and inches option. Don’t forget to select only the layers you use (top/bottom, Silk top/Silk bottom, Solder top/Solder bottom) and the RS274X format.
If my second batch of boards have a problem, I’ll update this post.
As last advice, I’d say to not rely on your power plane connections (if you poor a power plane on your board), but to make connections with tracks first and only then poor the power plane, so you’re sure that you’re within the minimum width/spacing specs.
Pick and Place 